If you have further questions related to this thread, you may click “Ask a related question” below. The glitch appears because the code attempts to read the last byte despite the fact that the previous bytes were all correct. Because of that I am not sure how the chip can read the first byte and determine if it has to switch to bit addressing mode. In reply to Anand Kulkarni I didn’t dig deep into the driver i just solved the problem quick and dirty by setting tx buffer to zero in the spidev driver. Feb 6, 7: That was a bummer.
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We use a bit addressable SPI flash. In reply to Veeranna Hanchinal:. We are glad that we were able to resolve this issue, and will now proceed to close this thread.
[3/6] DaVinci: Update for SPI support on DM SOC – Patchwork
But when I switch to SPI boot, nothing happens. Typically, first 8 bytes are used for MAC address and thus could be anything.
The newly created question will be automatically linked to this question. Feb 22, 9: That glitch that thing stick on CS line around 2. Mar 2, 8: In reply to Gennadiy Sspi.
Due to the holidays, responses may be delayed. No license, either express or implied, by estoppel or otherwise, is granted by TI. It attempts to read the flash in 24 bit mode. If you have a related question, please click the ” Ask a related question ” button in the top right corner.
Oct 19, 1: Ask a related question What is a related question? If the issue is solved then please close it by verifying answer.
Additional info for DM355 SPI Boot
Go to Support forums. I replaced the linux 2.
Apr 1, 5: Menu Search through millions of questions and answers User. TI is a global semiconductor design and manufacturing company. In reply to Ravikiran HV:.
Soi are glad that we were able to resolve this issue, and will now proceed to close this thread. Ask a related question Ask a new question. Si a new question Ask a new question Cancel. I rm355 to know what commands are sent during SPI boot and what is expected back. Because of that I am not sure how the chip can read the first byte and determine if it has to switch to bit addressing mode. Hope for a quick response. It appeared that when dm was reading on the spi, it was actually resending received data to our slave device on the spi bus, i didn’t fully checked what i am saying i am just supposing that it’s what occured.
Is there any more info on what commands soi sent to the memory chip and what is expected to come back so that I can verify compatibility. Nori, Sekhar Current description in “ARM subsystem If only they had that in the datasheet, it would’ve saved me a whole lot of time.
Aug 3, 7: